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A Cyclic Hardware Encoder using an FPGA

  • 19-01-2004 7:10pm
    #1
    daveirl
    Closed Accounts Posts: 14,483 ✭✭✭✭


    This post has been deleted.


Comments

  • #2
    adunniade
    Registered Users, Registered Users 2 Posts: 2 ✭adunniade


    The link is not working did you delete the post


  • #3
    D-Generate
    Registered Users, Registered Users 2 Posts: 2,946 ✭✭✭D-Generate


    Old school resurrection of a thread! I would be shocked if the same project is been given in UCC's EE2006 module after a whopping 8 years.

    Anyway, my report from that module is here http://dl.dropbox.com/u/57868310/Reports/digi.docx. I received a first for that report in 06/07 although not sure how since the language used in it is shocking.

    Enjoy.


  • #4
    adunniade
    Registered Users, Registered Users 2 Posts: 2 ✭adunniade


    Thanx. Its not a project just a simple class assignment. Not this complicated


  • #5
    Knifey Spoony
    Registered Users, Registered Users 2 Posts: 1,557 ✭✭✭Knifey Spoony


    D-Generate wrote: »
    Old school resurrection of a thread! I would be shocked if the same project is been given in UCC's EE2006 module after a whopping 8 years.

    Anyway, my report from that module is here http://dl.dropbox.com/u/57868310/Reports/digi.docx. I received a first for that report in 06/07 although not sure how since the language used in it is shocking.

    Enjoy.

    It was still going up until last year, but varied between the CRC encoder and a linear block code decoder. I did the block code one myself two years ago.

    The modules has been scraped for the new Elec Eng course though, in second year anyway, but won't be surprised if it did make a reappearance in third year.


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